Quantitative Evaluation of Hardware Binary Stochastic Neurons

Recently there has been increasing activity to build dedicated Ising Machines accelerate the solution of combinatorial optimization problems by expressing these as a ground-state search model. A common theme such is tailor physics underlying hardware mathematics model improve some aspect performance that measured in speed solution, energy consumption per or area footprint adopted hardware. One approach an spin, binary stochastic neuron (BSN), compact mixed-signal unit based on low-barrier nanomagnet design uses single magnetic tunnel junction (MTJ) and three transistors (3T-1MTJ) where MTJ functions resistor (1SR). Such can drastically reduce BSNs while promising massive scalability leveraging existing Magnetic RAM (MRAM) technology integrated 1T-1MTJ cells ~Gbit densities. The 3T-1SR however be realized using different materials devices provide naturally fluctuating resistances. Extending previous work, we evaluate from this general perspective classifying necessary sufficient conditions fast energy-efficient BSN used scaled Machine implementations. We connect our device analysis systems-level metrics emphasizing hardware-independent figures-of-merit flips second dissipated random bit classify any Machine.